Advantest 93k Tester Manual -

This guide provides a structured overview of the Advantest V93000 (93k) SoC Test System. Since the official manual is proprietary and typically requires an Advantest Support (Advan-T) account, this summary serves as a technical roadmap for navigating the system's hardware and SmarTest software environment. 1. System Hardware Architecture

The V93000 is a modular "Tester-on-a-Card" system. Understanding the physical layout is the first step in troubleshooting or setup.

Test Head: Contains the pin electronics and water-cooling system. It is where the load board (DIB) is docked. Workstation

: The Linux-based controller running the SmarTest software suite. I/O Cards: Common modules include the Pin Scale 1600 (digital), (analogue/power), and (Device Power Supply). 2. Software Environment (SmarTest)

The primary interface for the 93k is the SmarTest software (versions 7.x or 8.x).

SmarTest 7: Uses a spreadsheet-based approach (Test Table) and C++ for test methods. advantest 93k tester manual

SmarTest 8: A newer, object-oriented environment that utilizes Java and a more visual flow-based programming style. 3. Essential Operating Procedures To get the tester running, follow these standard steps:

Boot-Up & Calibration: Power on the workstation and mainframe. Run the Daily Check or Focus Calibration to ensure pin accuracy and signal integrity. Loading a Test Program: Load the Level File (.lev) to set voltages and timing.

Load the Timing File (.tim) to define wave bins and periods.

Load the Pattern File (.bin/.vec) which contains the functional vectors.

Diagnostics: Use the Hardware Monitor to check for temperature alarms or power supply faults. 4. Key Documentation Files This guide provides a structured overview of the

When looking through the official Advantest documentation, prioritize these manuals:

System Setup Guide: Instructions for docking/undocking and utility requirements.

SmarTest User Manual: Detailed guide on writing test flows and using the "Data Log" for debugging.

Test Method Programming Guide: Essential for creating custom C++/Java routines for complex measurements.

Maintenance Manual: Provides error code lookups and board replacement procedures. 5. Debugging Tools Use the search function in the PDF for

Digital Scope: A visual tool to inspect real-time waveforms at the DUT (Device Under Test) pins.

Data Log: The primary output window showing pass/fail results, binning information, and parametric data.

Shmoo Plot: Used to characterize device margins by sweeping two parameters (e.g., Voltage vs. Frequency).


5. Tips for Using the Manual Effectively

2.1 The Testhead

The testhead is the primary interface between the ATE and the Device Under Test (DUT). It houses the pin electronics cards and provides the cooling infrastructure (forced air or liquid cooling).

3.2 The Pin Configuration File

Before writing test code, the user must define the Pin Configuration. This maps the physical pins on the device to the channels on the tester.