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Verigy 93k Tester Manual May 2026

Report: Verigy 93K Tester Manual

The Ultimate Guide to the Verigy 93K Tester Manual: Architecture, Operation, and Debug

6. Recommended Best Practices

  • Maintain versioned copies of test programs and site configurations.
  • Keep a calibration and maintenance log for each tester.
  • Implement controlled procedures for module swaps and firmware updates.
  • Train operators on safe handling, test executive usage, and basic troubleshooting.

7.2 RF Option (93K-RF)

The manual includes chapters on:

  • VSG/VSA calibration (Vector Signal Generator/Analyzer).
  • I/Q imbalance correction using embedded DSP.

2. Software Suite (SMARTEST)

The V93K runs on a Linux-based OS and uses SmarTest as the primary software environment.

  • SmarTest 7 / 8 / 9: The GUI environment used to develop test programs and debug.
  • Test Methods: Pre-written C++ code blocks used to test specific parameters (e.g., VMI for voltage measurement).
  • Levels: The section where you define voltage/current limits for the DUT supplies.
  • Timing & Levels: The most critical setup tabs.
    • Timing: Sets the frequency, period, and edge placement (strobes).
    • Levels: Sets VDD, VIH, VIL, VOH, VOL, and current limits (Clamp currents).

Additional Tips

  • Ensure you have the correct model number and any revision numbers if applicable.
  • Always follow safety guidelines when operating testing equipment to avoid damage to the device or injury to yourself.
  • If you're using the device in a professional capacity, make sure you're properly trained and certified to operate it.

If you have any more details about the Verify 93k tester, such as its application or any specific functions you're trying to use, I could try to provide more tailored advice.

Title: Navigating the Verigy V93000: A Critical Analysis of the Tester Manual and User Experience

Introduction In the complex world of semiconductor design and manufacturing, the Automatic Test Equipment (ATE) serves as the final arbiter of quality. Among the most prominent platforms in the industry is the Verigy V93000 (often referred to simply as the "93k"). Following Verigy’s acquisition by Advantest, the V93000 solidified its position as a standard for testing System-on-Chip (SoC) and mixed-signal devices. However, the sophistication of the hardware is matched only by the complexity of its operation. The primary interface between the engineer and this machine is the V93000 Tester Manual and its associated software documentation. This essay explores the structure, utility, and challenges of the V93000 manual, arguing that while it is an encyclopedic technical resource, it requires a distinct pedagogical approach to transform from a reference tome into a practical engineering tool.

The Architecture of Documentation The first aspect a user encounters when approaching the V93000 is the sheer scale of the documentation. Unlike consumer electronics, an ATE platform does not come with a single "quick start guide." The manual is a sprawling ecosystem, typically divided into hardware architecture, system software (SmarTest), and specific instrumentation (pin electronics cards like the AV8, MV18, or DPS128).

The hardware sections of the manual are rigorous and precise. They excel at delineating the physical topology of the tester, specifically the "test head," the "test processor," and the crucial "pin electronics." For a test engineer, understanding the signal path from the pin card to the device under test (DUT) is fundamental. The manual provides exhaustive specifications regarding voltage ranges, timing resolution, and current drive capabilities. This level of detail is necessary; in the realm of nanometer-scale semiconductors, a misinterpretation of impedance or bandwidth limitations can result in millions of dollars of yield loss. Therefore, the manual’s strength lies in its role as a definitive reference for "truth" regarding hardware capabilities.

The Software Divide: SmarTest and the Learning Curve While the hardware documentation outlines what the machine can do, the software documentation outlines how to do it. The V93000 operates primarily on the SmarTest software environment. The manuals covering SmarTest are often the source of the steepest learning curve for new engineers.

The documentation introduces a proprietary paradigm. Unlike general-purpose programming languages, ATE programming is event-driven and timing-centric. The manual explains the "tester language," which includes constructs for defining timing sets, levels, and vector memory. However, a common critique among engineers is that the manual often focuses on syntax rather than strategy. It effectively explains what a command looks like, but it frequently struggles to explain the architectural philosophy of why a test should be structured in a certain way.

For example, navigating the documentation regarding the "digital pattern compiler" or "timing and level specifications" requires not just coding knowledge, but a deep understanding of signal integrity. The manual assumes a high level of prerequisite knowledge in test engineering principles. It does not teach testing; it teaches the operation of the specific tool. Consequently, the manual is often viewed as a dictionary rather than a textbook—essential for looking up definitions, but insufficient for learning the language.

Navigating the Transition: Verigy to Advantest A unique challenge in analyzing the V93000 manual is the historical context of the Verigy and Advantest merger. Long-time users often have to navigate a legacy of documentation. Older manuals may reference legacy Verigy terminologies, while newer updates integrate Advantest’s broader portfolio.

This transition has complicated the user experience. While the core V93000 architecture remains, documentation for newer cards or software updates (such as SmarTest 8 or 9) is integrated into a broader knowledge base. The searchability of these manuals has improved with digital integration, yet the fragmentation of information across release notes, application notes, and core manuals remains a hurdle. An engineer often finds themselves cross-referencing three separate documents to diagnose a single calibration error or driver update.

The "Application Note" Culture Perhaps the most telling critique of the standard V93000 manual is the industry’s reliance on "Application Notes." Because the standard manual can be dry and abstract, a secondary market of documentation has emerged. Field Application Engineers (FAEs) and third-party trainers produce guides that translate the manual’s rigid specifications into practical solutions.

This phenomenon suggests that the official manual, while accurate, lacks context. It describes the "AV8" pin card’s drive bandwidth in meticulous detail, but it may not sufficiently explain how to compensate for signal integrity loss at the load board interface. The gap between the manual's theoretical capabilities and the practical reality of a test cell is often bridged by experienced peers rather than the official text.

Conclusion The Verigy V93000 tester manual is a monumental technical achievement, reflecting the sophistication of the hardware it describes. It serves as an indispensable reference for specifications, hardware constraints, and software syntax. However, its utility is heavily dependent on the user's expertise. For the novice, it presents a formidable barrier to entry; for the expert, it is a vital anchor of truth. Ultimately, the V93000 manual exemplifies the broader challenge of technical writing in high-tech industries: balancing the need for exhaustive precision with the necessity of practical guidance. As ATE technology evolves, the documentation must move beyond mere description to become a more integrated, educational framework for the engineers who keep the semiconductor world running.

To access the official Verigy (Advantest) V93000 (93k) tester manuals, you generally need to go through the official manufacturer portal. Because these systems are proprietary, the full technical manuals are rarely available as direct public downloads. Where to Find the Manuals Advantest Software Center (Official) : This is the primary source for all documentation, including

software guides and hardware manuals. You must have a service agreement to request access to the Software Center myAdvantest portal Technical Documentation Center (TDC)

: Advantest provides a standalone help application called the that allows you to navigate and search the complete documentation offline In-Software Help : If you already have the

software installed, you can often access the manual directly by choosing Help > Help Contents within the application. ADVANTEST CORPORATION Manual Content Highlights The V93000 documentation suite typically covers: Hardware Overview

: Details on the scalable platform, water cooling technology, card cage structure, and pogo blocks. SmarTest Software

: Concept overviews, file structures, and guides for the Flow Sequence and Flow Data editors. DUT Board Design

: Mechanical and performance considerations for designing Device Under Test (DUT) loadboards. Safety & Maintenance

: Critical procedures for system start-up, shutdown, and general electrical safety to avoid fire or shock hazards. Supplementary Resources

If you cannot access the official portal, these third-party summaries provide high-level technical details: V93000 Technical Documentation - Advantest

Verigy (now Advantest) V93000 (93k) tester manuals are primarily distributed through Advantest's proprietary portals, but several technical guides and reference manuals are available through authorized partners or archive sites. Official Documentation Center The primary source for all current V93000 manuals is the Advantest Technical Documentation Center (TDC) Requires a service agreement and a myAdvantest portal

Includes the SmarTest help system, hardware specifications, and maintenance guides. AI Support: verigy 93k tester manual

The TDC now features an AI-powered assistant to help engineers find specific step-by-step guidance through natural language queries. ADVANTEST CORPORATION SmarTest Software & Programming Guides SmarTest Overview:

A detailed breakdown of the software environment used to control the tester, including pin configuration, level setup, and timing. SmarTest 7 Digital Training: Documentation for the Smart Scale

series, covering test flow, calibration, and debugging tools like Shmoo plots. Device License Lab: For software administration, the V93000 Device License Lab Guide provides instructions on using the

license management utility and starting SmarTest in offline mode. Hardware & System Reference Hardware Overview:

Covers the SOC tester platform architecture, water cooling technology, and card cage structure. System Reference: Includes detailed material on system start-up and shutdown

, DUT board mechanical design, and analog module restrictions. Direct-Probe™ Manuals:

Documentation for wafer-stage testing and signal integrity maintenance. Utah Nanofab Third-Party & Auxiliary Guides user guides - CMC Microsystems

The Verigy 93000 (now the Advantest V93000) manual is no longer a single physical book but a massive digital library integrated into the Technical Documentation Center (TDC).

To access the "complete piece," you must use the Advantest TDC Viewer or the help system built into the SmarTest software. Core Manual Components The documentation is organized into these primary sections:

System Reference: Covers hardware properties, test system components, start-up/shutdown, and device power supply (DPS).

SmarTest Software Guides: Detailed instructions for SmarTest 7 (Eclipse-based) or SmarTest 8, including test flow creation, test method coding in C++, and debugging.

Hardware Specifications: Detailed info on pin scale cards (e.g., PS1600, PS9G) and DC scale instruments like DPS128 or UHC4.

DUT Board Design Guidelines: Critical mechanical and electrical specs for designing loadboards and interface hardware. How to Get the Manuals

Because the full documentation contains proprietary details, it is restricted:

Register at myAdvantest Portal: Access requires an active service agreement with Advantest.

Download the TDC Viewer: For Windows 10/11, you must install the standalone TDC application first, then download the specific documentation packages (e.g., Smart Scale or EXA Scale).

Local Linux Access: On V93000 workstations (RHEL), the viewer is typically pre-installed under the Advantest V93000 menu. External Resources

If you don't have a service agreement, you can find high-level overviews and training slides on third-party sites:

General System Overviews: Educational summaries like this V93000 Hardware Overview are available on Scribd.

Partner Manuals: If using third-party extensions, MultiLane provides detailed system manuals for high-speed I/O testing on the V93K platform. V93000 Technical Documentation - Advantest

The Verigy (now Advantest) V93000 tester is a highly scalable Automated Test Equipment (ATE) platform used for semiconductor testing, covering everything from simple microcontrollers to complex SoCs, RF, and High-Speed I/O devices.

The primary repository for all manuals and guidance is the Technical Documentation Center (TDC), which is available as a standalone viewer or integrated directly into the SmarTest software. 1. Accessing the Manuals

Official documentation is proprietary and typically requires a service agreement with Advantest to download from their Software Center.

TDC Viewer: A dedicated application (for Windows and Linux) used to navigate the full suite of V93000 documents.

In-Software Help: Within SmarTest, users can access documentation by selecting Help > Help Contents. Report: Verigy 93K Tester Manual The Ultimate Guide

Dynamic Help: Highlighting a specific API in the Test Method editor and selecting Help > Dynamic Help will pull up relevant technical information from the TDC. 2. Core Manual Categories

The documentation suite is divided into several functional areas:

Hardware Overview & Maintenance: Covers system infrastructure, including the different test head classes (A, C, S, and L), power supplies, and cooling systems. It includes procedures for docking loadboards and handling the test head.

SmarTest Software Guide: Detailed manuals for the SmarTest environment (v7.x, v8.x). This includes using the Eclipse-based Workcenter, managing Device Directories, and using editors for timing, levels, and test flows.

Instrument Reference: Specific manuals for hardware cards like:

Pin Scale: Digital testing at various speeds (e.g., PS1600, PS9G).

DC/VI Scale: High-precision DC and device power supply (DPS) modules.

Wave Scale: Modules dedicated to RF and mixed-signal applications.

Programming & Test Methods: Documentation on developing C++ test programs using Universal Test Method (UTM) libraries (e.g., dc_tml, ac_tml, scan_tml). 3. Key Technical Concepts in Documentation

93k Tester 02 Hardware Overview Rev.7.2.2.A.00 | PDF - Scribd

To verify the Verigy V93000 (now Advantest V93K) tester manual or documentation, you must access the official myAdvantest portal

, as most technical manuals are protected and require a service agreement. ADVANTEST CORPORATION How to Access the Official Manuals Log in to myAdvantest : Go to the myAdvantest portal Request Software Center Access : If you don't have it, navigate to Self Services Software Center

. Access usually requires an active service agreement with Advantest. Use SmarTest Help : If you are already on a workstation, you can open the Technical Documentation Center (TDC) directly within SmarTest by selecting Help Contents Dynamic Help

: For specific API verification, highlight the API in the Test Method editor and click Dynamic Help to see relevant info from the TDC. ADVANTEST CORPORATION Key Technical Manuals & Resources System Reference

: Covers startup/shutdown, test head components (CTH/STH), and DUT board design. SmarTest Software Overview

: Essential for understanding test flow generation and the Test Method editor. Hardware Overviews

: Provides details on specific modules like the SMU8 (DC measurement) or AVI64 (analog pins). Direct-Probe™ Evolution

: Documentation on wafer probing and signal integrity at the die level. Utah Nanofab Safety & Connection Essentials Terminal Ratings

: Always check the manual for maximum ratings before making connections to prevent fire or shock. Physical Connections

: Ensure proper connection of "air input" (utility box), power cables for the test head (STH/CTH), and Workstation Ethernet before powering up. hardware pinout for a particular card? V93000 Technical Documentation - Advantest

The Verigy V93000 (93k) documentation suite, managed by Advantest, consists of modular guides covering SmarTest software (7 or 8), hardware configurations, and DUT board design, accessible through the Technical Documentation Center. Comprehensive manuals and datasheets are available for various test head types and cards, including digital Pin Scale 400 and analog MBAV8 cards. Access Advantest's technical documentation at ADVANTEST CORPORATION V93000 Technical Documentation - Advantest

The Verigy V93000 (now Advantest) is a high-performance system-on-a-chip (SoC) tester. While the official full manual is proprietary and typically accessed through the Advantest Technical Documentation Center (TDC), this guide outlines the standard operating procedures and manual testing workflows for engineers. 1. Hardware System Overview

Before starting, verify the physical configuration of the V93000 platform.

Test Head: Contains the pin electronics and card cages. Ensure it is properly docked (hard docked) to the DUT (Device Under Test) loadboard.

Workstation: Usually runs Red Hat Enterprise Linux (RHEL) to host the SmarTest software. Maintain versioned copies of test programs and site

Infrastructure: Check water cooling status for high-power systems or compressed air for specific HSIO (High-Speed I/O) modules. 2. Software Setup (SmarTest 8)

Manual testing is primarily conducted through the SmarTest 8 environment. AT93000 System User Manual - Multilane

The Verigy 93000 (93k) SOC Series remains a cornerstone of Automated Test Equipment (ATE) for high-performance semiconductors. Navigating its extensive documentation is essential for test engineers looking to optimize throughput and maintain signal integrity. This guide provides a strategic overview of the Verigy 93k tester manual, focusing on the SmarTest environment, hardware configurations, and troubleshooting protocols. Understanding the Verigy 93k Architecture

The 93k platform is designed around a scalable architecture that allows for "per-pin" resources. Unlike traditional testers that share resources across multiple pins, the 93k provides dedicated timing, levels, and pattern memory for each channel. This ensures that complex System-on-Chip (SoC) devices can be tested with maximum precision.

The manual typically divides the system into several key components: The Workstation: Running the SmarTest software environment.

The Test Head: Containing the pin electronics and cooling systems.

The Power Distribution Unit (PDU): Managing the high-current demands of modern processors.

The Manipulator: Providing the mechanical interface to probers or handlers. SmarTest Software Environment

The heart of the 93k manual is the SmarTest documentation. SmarTest is the software suite used to develop, debug, and execute test programs. Engineers must be familiar with the following core tools:

Pin Configuration: This section explains how to map logical device pins to physical tester channels. It covers the setup of different pin types, such as High-Speed Digital, Analog, or Power Supply pins.

Level Setup: Precise voltage levels are critical for CMOS logic. The manual details how to set VIHcap V sub cap I cap H end-sub VILcap V sub cap I cap L end-sub VOHcap V sub cap O cap H end-sub VOLcap V sub cap O cap L end-sub for various drive and receive modes.

Timing and Equations: The 93k uses an equation-based timing system. Instead of hard-coding values, engineers use variables to define cycle times and edge placements, allowing for easy frequency scaling during characterization.

Vector/Pattern Loading: Efficiently managing large pattern files is a recurring theme in the manual. It provides instructions on converting third-party formats (like WGL or STIL) into the native 93k binary format. Key Calibration and Maintenance Procedures

To ensure repeatable results across different testers, the Verigy 93k manual emphasizes strict calibration routines.

Standard Calibration (StdCal): This is a software-driven routine that adjusts for internal tester skews. It should be performed weekly or whenever the test head temperature shifts significantly.

Focused Calibration (FocCal): Used for high-precision applications, this calibrates specific pins to the Device Under Test (DUT) interface board level, compensating for traces and socket parasitics.

Diagnostics: The manual includes a comprehensive list of error codes. Running the "Check Health" diagnostic tool is the first step in troubleshooting any hardware failure, such as a blown fuse or a malfunctioning pin electronics (PE) card. Developing a Test Program

A standard test flow in the 93k environment follows a specific hierarchy outlined in the manual:

Continuity/Open-Shorts: The first line of defense to ensure the DUT is seated correctly. DC Parametrics: Measuring leakage currents ( IILcap I sub cap I cap L end-sub IIHcap I sub cap I cap H end-sub ) and power consumption ( IDDQcap I sub cap D cap D cap Q end-sub

Functional Testing: Executing patterns at speed to verify logic gates.

AC Parametrics: Measuring setup/hold times and propagation delays. Advanced Troubleshooting Tips

When the tester behaves unexpectedly, the manual suggests a "divide and conquer" approach. First, verify the hardware by swapping a suspected bad PE card with a known good one. Second, use the Data View tool in SmarTest to inspect real-time waveforms. This allows you to see exactly where a timing edge is falling relative to the data window.

💡 Pro Tip: Always maintain a "Golden Device." If a test fails across multiple units, run the Golden Device to determine if the issue lies with the tester hardware or the test program itself.

By mastering the Verigy 93k manual, engineers can reduce test time, improve yield, and ensure that only the highest quality silicon reaches the market. Whether you are performing wafer sort or final package test, a deep understanding of SmarTest and the 93k hardware is your most valuable asset.

If you want to dive deeper into a specific area of the 93k system, let me know: SmarTest 7 vs. SmarTest 8 differences High-speed digital setup (multi-Gbps) Analog/Mixed-signal testing modules

Part 6: Common Errors & How the Manual Solves Them

| Error Message | Manual Reference | Typical Fix | |---------------|------------------|--------------| | Pin driver overcurrent | Hardware Troubleshooting -> DIB Shorts | Check DIB caps; reduce global current limit | | Pattern set mismatch | Pattern Compiler -> Link Order | Realign burst table indexes | | Calibration out of range | Service Guide -> TempComp | Run cal_tester -a with thermal chamber | | Undefined timing set | Timing Level Guide | Declare TS1 in timing.bt before use |